Optimal VLSI Architectural Synthesis: Area, Performance and Testability - The Springer International Series in Engineering and Computer Science - Catherine H. Gebotys - Bøker - Springer - 9780792392231 - 31. oktober 1991
Ved uoverensstemmelse mellom cover og tittel gjelder tittel

Optimal VLSI Architectural Synthesis: Area, Performance and Testability - The Springer International Series in Engineering and Computer Science 1992 edition

Catherine H. Gebotys

Pris
₪ 533

Bestillingsvarer

Forventes levert 4. - 12. aug
Legg til iMusic ønskeliste
Eller

Finnes også som:

Optimal VLSI Architectural Synthesis: Area, Performance and Testability - The Springer International Series in Engineering and Computer Science 1992 edition

Although research in architectural synthesis has been conducted for over ten years it has had very little impact on industry. The OASIC (optimal architectural synthesis with interface constraints) architectural synthesizer and the CATREE (computer aided trees) synthesizer demonstrate how these problems can be solved.


289 pages, biography

Media Bøker     Innbunden bok   (Bok med hard rygg og stivt omslag)
Utgitt 31. oktober 1991
ISBN13 9780792392231
Utgivere Springer
Antall sider 289
Mål 155 × 235 × 19 mm   ·   607 g
Språk Engelsk  

Vis alle

Mer med Catherine H. Gebotys