VHDL for Simulation, Synthesis and Formal Proofs of Hardware - The Springer International Series in Engineering and Computer Science - J Mermet - Bøker - Springer - 9780792392538 - 31. mai 1992
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VHDL for Simulation, Synthesis and Formal Proofs of Hardware - The Springer International Series in Engineering and Computer Science 1992 edition

J Mermet

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VHDL for Simulation, Synthesis and Formal Proofs of Hardware - The Springer International Series in Engineering and Computer Science 1992 edition

Presents recent research on four key issues related to the use of VHDL as a standard for hardware description: simulation of circuits using VHDL; the combination of synthesis and VHDL in designing circuits; the formal verification of VHDL designs; and modelling issues and system level design.

307 pages, biography

Media Bøker     Innbunden bok   (Bok med hard rygg og stivt omslag)
Utgitt 31. mai 1992
ISBN13 9780792392538
Utgivere Springer
Antall sider 307
Mål 155 × 235 × 19 mm   ·   625 g
Redaktør Mermet, Jean

Se alt med J Mermet ( f.eks. Innbunden bok )