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Digital System Test and Testable Design: Using HDL Models and Architectures 2011 edition
Zainalabedin Navabi
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Ft 44.314
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Digital System Test and Testable Design: Using HDL Models and Architectures
Zainalabedin Navabi
This book is about digital system testing and testable design. Verilog eliminates ambiguities in test algorithms and BIST and DFT hardware architectures, and it clearly describes the architecture of the testability hardware and its test sessions.
452 pages, 100 black & white illustrations, biography
| Media | Bøker Innbunden bok (Bok med hard rygg og stivt omslag) |
| Utgitt | 20. desember 2010 |
| ISBN13 | 9781441975478 |
| Utgivere | Springer-Verlag New York Inc. |
| Sjanger | Aspects (Academic) > Science / Technology Aspects |
| Antall sider | 435 |
| Mål | 178 × 254 × 25 mm · 1,01 kg |
| Språk | Engelsk |
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